On Wednesday, MPC 8500 revision 0.6 was received. This revision fixes a cache bug, and has improved altivec peformance to 85% of the 7460 G4's at equal Mhz that are now in production. This is up a whole 50%. There have also been some minor changes with changing the positioning of the L1 and L2 cache on the die. The majority of G5's in this lot that functioned ran at 1Ghz, 1.2Ghz, and 1.4Ghz, with a considerable number running at 1.6Ghz, and 2 chips tested at 2.4Ghz! The goal is to bump this up one step before release, which there is confidence in happening. There is another source of optimism: SGI is very interested in the G5 for its future workstations. It wants to abandon development of its MIPS line of microprocessors in the near future citing that it can no longer recoup its development costs, and produce a competitively priced UNIX workstation at the same time. There is however another source of irritation that has developed between Apple and Motorola: The 7460 G4's are now in volume production, and Motorola has enough available to give the G4 another speed bump as we speak in speeds up to 1.33 Ghz, but Apple does not want to do this because it just released an updated G4 lineup, and it does not want to have excess inventory of Power Mac G4's on hand if it can start offering the Power Mac G5 early next year. This means that Motorola will have to carry this 7460 inventory until Apple releases the next generation Powerbook G4 at Macworld Tokyo. This powerbook will essentially be the same as the 667Mhz model except that it will sport the 7460 G4 which has lower power consumption than the 7440. Revision 0.7 of the G5 is due out within the next two weeks. It will consist of changing the placement of various components on the die, and a small Altivec bug fix. Apple has shipped revision 0.5 G5's Macs to all its key developers. The prototypes are in plain beige PC cases. The prototype program Apple has is that Apple ships a new revised logic board to the developer, and they simply send back the old logic board. This time, the returned logic boards will simply receive a 0.6 G5, and will be sent to another developer. There are 500 machines out there, and with this revision, the aim is to bring it up to 1,500. One feature of the Book E architecture is certainly going to make Virtual PC users happy. An alpha version of an upcoming release of Virtual PC provides 1GHZ PIII performance on a G5 running at 1.4GHZ.